Preliminary analysis and design of a greedy algorithm for the manufacturing process of integrated circuits

Abstract

The stage of transporting semiconductor chips from the wafer to the support strip is crucial in the integrated circuit manufacturing process. This process can be modeled as a combinatorial optimization problem where the objective is to reduce the total distance the robotic arm must travel to pick up each chip and place it in its corresponding position within the support structure. This problem is of the pick-and-place type and is NP-hard. The (approximate) solution proposals of state-of-the-art methods include rule-based approaches, genetic algorithms, and reinforcement learning. In the present work one of these methods is analyzed, which models the problem as one of binary integer programming and proposes a genetic algorithm. Based on this analysis, we proposed and evaluated other methods, including a greedy algorithm that improves the state-of-the-art results for test cases usually used in the literature.