{"title":"CMOS active inductor for low voltage and low power wireless applications","authors":"V. Niranjan, A.Sai Kumar, S. B. Jain","doi":"10.1109/WOCN.2013.6616190","DOIUrl":null,"url":null,"abstract":"The low-voltage design is an effective method to decrease power consumption in a circuit. In this paper, a compact CMOS active inductor circuit is proposed. The circuit is based on the gyrator-C approach with both transconductance stages realized by MOS transistors. The proposed inductor is suitable for low voltage operation as it has minimum number of transistors and none of them suffers from body effect. The dynamic body bias technique increases self resonant frequency of the inductor and offers low power dissipation. To validate the proposed circuit, simulation results are provided for 0.25 μm CMOS process at 1.2 V supply voltage.","PeriodicalId":388309,"journal":{"name":"2013 Tenth International Conference on Wireless and Optical Communications Networks (WOCN)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-07-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 Tenth International Conference on Wireless and Optical Communications Networks (WOCN)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/WOCN.2013.6616190","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5
Abstract
The low-voltage design is an effective method to decrease power consumption in a circuit. In this paper, a compact CMOS active inductor circuit is proposed. The circuit is based on the gyrator-C approach with both transconductance stages realized by MOS transistors. The proposed inductor is suitable for low voltage operation as it has minimum number of transistors and none of them suffers from body effect. The dynamic body bias technique increases self resonant frequency of the inductor and offers low power dissipation. To validate the proposed circuit, simulation results are provided for 0.25 μm CMOS process at 1.2 V supply voltage.