CMOS active inductor for low voltage and low power wireless applications

V. Niranjan, A.Sai Kumar, S. B. Jain
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引用次数: 5

Abstract

The low-voltage design is an effective method to decrease power consumption in a circuit. In this paper, a compact CMOS active inductor circuit is proposed. The circuit is based on the gyrator-C approach with both transconductance stages realized by MOS transistors. The proposed inductor is suitable for low voltage operation as it has minimum number of transistors and none of them suffers from body effect. The dynamic body bias technique increases self resonant frequency of the inductor and offers low power dissipation. To validate the proposed circuit, simulation results are provided for 0.25 μm CMOS process at 1.2 V supply voltage.
用于低电压和低功率无线应用的CMOS有源电感
低压设计是降低电路功耗的有效方法。本文提出了一种紧凑的CMOS有源电感电路。该电路基于陀螺- c方法,两个跨导级均由MOS晶体管实现。该电感具有晶体管数量少、不受体效应影响等特点,适用于低压工作。动态体偏置技术提高了电感的自谐振频率,降低了电感的功耗。为了验证所提出的电路,提供了在1.2 V电源电压下0.25 μm CMOS工艺的仿真结果。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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