Michelle Lim, M. Islam, S. Jahariah, K. H. Yeo, S. Ali
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引用次数: 3
Abstract
This paper provides a comparison of low voltage design strategies in charge pumps that may be used with micro-power energy harvesters. The focus is on low input voltage (<; 500 mV) for possible cold start in monolithic integration. An overview of published low voltage techniques in charge pump designs are presented in four perspectives: body effect, gate voltages, MOS threshold voltage and power losses. Based on these four perspectives, latch-based charge pumps are constructed to compare the effects of several low voltage strategies on the charge pumps' performances. These charge pumps are simulated in two-stages using the common TSMC180nm CMOS technology. This results in the enhanced gate voltage (also lower conduction losses) and threshold lowering schemes having the fastest ramp-up of 10-20ms while zero-body effect scheme providing best voltage pumping efficiency > 90% for 100-500mV input voltage ranges. The results will help designers to achieve optimum low voltage operation in specific charge pump performance metrics.