IC layout and manufacturability: critical links and design flow implications

Abstract

We assess the prospects for new tools and flows in the interface between layout design and manufacturability. We begin with a review of classic elements of this interface, then focus on more recently critical issues: (i) layout design for reduced CMP variability; (ii) layout design for PSM; and (iii) layout design for OPC. Our discussion highlights the many ways in which layout affords effective means of optimizing manufacturability, as well as opportunities for research and development.