{"title":"A low power low cost fully integrated UHF RFID reader with 17.6dBm output P1dB in 0.18 µm CMOS process","authors":"Jingchao Wang, Chun Zhang, Zhihua Wang","doi":"10.1109/RFIC.2010.5477299","DOIUrl":null,"url":null,"abstract":"A low power low cost fully integrated single-chip UHF radio frequency identification (RFID) reader for short distance handheld applications is presented in this paper. The IC integrates all building blocks—including an RF transceiver, a PLL frequency synthesizer, a digital baseband and a MCU—in a 0.18 µm CMOS process. A high-linearity RX front-end and a low-phase-noise synthesizer are designed to handle the large self-interferer. A class-E power amplifier with high power efficiency is also integrated to fulfill the function of a UHF passive RFID reader. The measured output P1dB power of the transmitter is 17.6dBm and the measured receiver sensitivity is −60dBm. The digital baseband including MCU core consumes 3.9mW with a clock of 10MHz and the analog part including power amplifier consumes 281.5mW. The chip has a die area of 5.1mm*3.8mm including pads.","PeriodicalId":269027,"journal":{"name":"2010 IEEE Radio Frequency Integrated Circuits Symposium","volume":"16 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 IEEE Radio Frequency Integrated Circuits Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RFIC.2010.5477299","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
A low power low cost fully integrated single-chip UHF radio frequency identification (RFID) reader for short distance handheld applications is presented in this paper. The IC integrates all building blocks—including an RF transceiver, a PLL frequency synthesizer, a digital baseband and a MCU—in a 0.18 µm CMOS process. A high-linearity RX front-end and a low-phase-noise synthesizer are designed to handle the large self-interferer. A class-E power amplifier with high power efficiency is also integrated to fulfill the function of a UHF passive RFID reader. The measured output P1dB power of the transmitter is 17.6dBm and the measured receiver sensitivity is −60dBm. The digital baseband including MCU core consumes 3.9mW with a clock of 10MHz and the analog part including power amplifier consumes 281.5mW. The chip has a die area of 5.1mm*3.8mm including pads.
提出了一种低功耗、低成本的全集成单片机UHF射频识别(RFID)阅读器,用于短距离手持应用。该IC集成了所有构建模块,包括射频收发器、锁相环频率合成器、数字基带和mcu,采用0.18 μ m CMOS工艺。设计了一个高线性RX前端和一个低相位噪声合成器来处理大的自干扰。集成了功率效率高的e类功率放大器,实现了超高频无源RFID阅读器的功能。测得发射机输出P1dB功率为17.6dBm,测得接收机灵敏度为−60dBm。包含MCU核心的数字基带功耗为3.9mW,时钟为10MHz,包含功率放大器的模拟部分功耗为281.5mW。该芯片的芯片面积为5.1mm*3.8mm(包括焊盘)。