{"title":"Breaking an application specific instruction-set processor: the first step towards embedded software testing","authors":"J. Dielissen, B. O. Mathijssen, J. Huisken","doi":"10.1109/HLDVT.2002.1224434","DOIUrl":null,"url":null,"abstract":"In this paper methods to stop an Application Specific Instruction set Processor (ASIP) are proposed. Constructing the stop criteria for an ASIP on a combination of program counter - and data values is expensive,. and therefore a novel solution, in which the micro program is extended, is investigated. The cost of this extension is limited due to the relative small program size, and optimisations are proposed for even further reduction. Due to the flexible setup of the tool that generates the ASIP both the analysis data of the needed debug hardware and the generation of this hardware can be automated.","PeriodicalId":179418,"journal":{"name":"Seventh IEEE International High-Level Design Validation and Test Workshop, 2002.","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2002-10-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Seventh IEEE International High-Level Design Validation and Test Workshop, 2002.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/HLDVT.2002.1224434","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
In this paper methods to stop an Application Specific Instruction set Processor (ASIP) are proposed. Constructing the stop criteria for an ASIP on a combination of program counter - and data values is expensive,. and therefore a novel solution, in which the micro program is extended, is investigated. The cost of this extension is limited due to the relative small program size, and optimisations are proposed for even further reduction. Due to the flexible setup of the tool that generates the ASIP both the analysis data of the needed debug hardware and the generation of this hardware can be automated.