An Analysis of Interpolation Implementation for LNS Addition and Subtraction Function in Positive Region

S. Z. M. Naziri, R. C. Ismail, A. Shakaff
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引用次数: 3

Abstract

Interpolation is among of the most popular approach used in approximating the values in logarithmic number system (LNS) arithmetic design. This method that often combines with lookup tables (LUTs) manages to produce efficient LNS design in area, latency and accuracy. Current research proves that the combination of interpolators with co-transformation in LNS subtraction had shown extreme improvements in terms of speed and area, which is comparable to floating point (FLP) performance. Taking the advantage, this research had been conducted to analyze the implementation of these three interpolators, which are Taylor, Lagrange and modified Lagrange, in a 32-bit environment of the LNS addition and subtraction procedures with the first-order co-transformation in positive region. The designs were analyzed in two categories, which are the accuracy towards FLP and the total memory consumption. The best interpolator was selected based on the most optimum area consumption design with manageable accuracy in FLP limit. The outcome of this analysis could benefit further improvements in LNS design.
正区域LNS加减函数插值实现分析
插值是对数系统(LNS)算法设计中最常用的逼近方法之一。这种方法通常与查找表(lut)相结合,可以在面积、延迟和准确性方面实现高效的LNS设计。目前的研究证明,在LNS减法中,内插器与共变换的结合在速度和面积上都有极大的提高,与浮点(FLP)性能相当。利用这一优势,本研究分析了泰勒、拉格朗日和修正拉格朗日这三种插值器在32位环境下正区域一阶共变换的LNS加减过程的实现。从两个方面对设计进行了分析,即对FLP的准确性和总内存消耗。根据最优的面积消耗设计选择最佳插补器,并在可控制的FLP极限精度下选择最佳插补器。这一分析结果有助于进一步改进LNS的设计。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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