Ultra-low power dB linear variable gain amplifier with minimalistic Noise using Adaptive biasing

Abstract

In this paper an ultra-low power high bandwidth dB linear circuitry has been proposed. The proposed work exhibits higher dynamic range of gain with zero equaling gain error. The working principle of the circuit is to provide variable gain, which is why it is called variable gain amplifier. The proposed circuitry has been designed in such a way so that we can get zero gain error. The circuit has designed and tested on Cadence EDA tool with UMC_180nm CMOS technology node. Unlikely in general topology, proposed circuit has pull up unit which includes both n-mos and p-mos transistors. In order to achieve linearity in gain, the working of the pair of transistors able to provide exponential function at the output, which improves the circuitry in terms of area. For optimizing minimal gain error, VGA is more challenging to implement because it, s higher gain error which has been reduced in this work by using cross-coupled diode connected load with I-2I technique. The proposed design offers 72dB gain out of which 50dB is dB-linear with less than 0.5 gain error. Input referred noise for one unit is 3.2nV/$\surd\mathrm{Hz}$. The improvised bandwidth is 219.766 MHz.4 cell VGA has been designed and tested the total power consumption is less than 120uW. Total input referred noise is 6.3nV/$\sqrt{\mathrm{Hz}}$.