Challenges for extra large embedded wafer level ball grid array development

J. Luan, Yonggang Jin, K. Goh, Yiyi Ma, G. Hu, Yaohuang Huang, X. Baraton
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引用次数: 16

Abstract

Fan-out embedded wafer level ball grid array (eWLB) is a very promising packaging technology with many advantages in comparison to standard Ball Grid Array Packages and leadframe based packages because of smaller size, better electrical and thermal performance, higher package interconnect density and system integration possibilities at low packaging cost. It was successfully developed for medium and large-size package. However, there is strong need to develop extra large eWLB for system integration. Compared with large eWLB, there are many challenges for extra large eWLB development. Wafer or panel level warpage, package level reliability, and board level reliability are ones of the most challenging issues. In this paper, finite element modeling was used to create design rules and optimize test vehicles based on the correlation done for medium, large-size eWLB. Two test vehicles were indentified for process development and reliability test. Recent progress in the extra large eWLB development is introduced in this paper, the results show that the design rule and process capability are reliable and ready for extra large molded embedded wafer level package for system integration needs.
超大嵌入式晶圆级球栅阵列发展的挑战
扇出嵌入式晶圆级球栅阵列(eWLB)是一种非常有前途的封装技术,与标准球栅阵列封装和引线框架封装相比,由于尺寸更小,电气和热性能更好,封装互连密度更高,封装成本更低,系统集成可能性更大,因此具有许多优势。成功地开发了大中型封装。然而,为了实现系统集成,迫切需要开发超大型eWLB。与大型eWLB相比,超大型eWLB的开发面临许多挑战。晶圆或面板级翘曲,封装级可靠性和板级可靠性是最具挑战性的问题之一。本文在对中大型eWLB进行相关性分析的基础上,采用有限元建模的方法建立设计规则并对试验车辆进行优化。确定了两辆测试车用于工艺开发和可靠性测试。本文介绍了超大尺寸嵌入式晶圆级封装的最新研究进展,结果表明,超大尺寸嵌入式晶圆级封装的设计规则和工艺能力是可靠的,可以满足系统集成的需求。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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