An operational amplifier for high performance pipelined ADCs in 65nm CMOS

Sima Payami, A. Ojani
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引用次数: 7

Abstract

A CMOS fully differential high gain-bandwidth (GBW) product operational amplifier (OpAmp) is presented in this paper. In order to achieve a high gain, the Nested gain-boosting technique [1] is employed. The design is implemented in a 1.1V standard 65nm CMOS process. The DC-gain of the OpAmp is larger than 77.9dB with the unity-gain frequency of 4.61GHz while achieving 76.2 degrees of phase margin (PM). Applying the maximum input swing, the output signal settles to 0.01% accuracy in less than 3.8ns. The output total harmonic distortion (THD) of the OpAmp is 0.586% for maximum signal swing at the frequencies near Nyquist frequency with the input-referred noise of 5.4nV/√Hz. The high GBW product of this design makes it suitable for 12-bit 200MS/s pipelined ADC applications.
一种用于65nm CMOS中高性能流水线adc的运算放大器
介绍了一种CMOS全差分高增益带宽积运算放大器(OpAmp)。为了获得高增益,采用了嵌套增益增强技术[1]。该设计采用1.1V标准65nm CMOS工艺实现。该OpAmp的直流增益大于77.9dB,单位增益频率为4.61GHz,相位裕度为76.2度。应用最大输入摆幅,输出信号在小于3.8ns的时间内达到0.01%的精度。在奈奎斯特频率附近的最大信号摆幅下,OpAmp的输出总谐波失真(THD)为0.586%,输入参考噪声为5.4nV/√Hz。本设计的高GBW产品适用于12位200MS/s的流水线ADC应用。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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