Optimal switching sequences for one-dimensional linear gradient error compensation in unary DAC arrays

Abstract

Gradient error can be compensated by optimizing switching sequences of DAC arrays. This paper establishes an absolute lower bound of integral nonlinearity (INL) which may be achieved by optimizing switching sequences. Optimal switching sequences that meet this lower bound are presented for one-dimensional linear gradient error compensation in unary (thermometer decoded) DAC arrays. The sequences can be used in row-column decoded current or capacitor unary arrays as well as R-string DACs, where the switching sequence is optimized in one dimension.