A new VLSI architecture for large Hopfield's neural networks

M. Verleysen, B. Sirletti, P. Jespers
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引用次数: 1

Abstract

A new CMOS architecture for Hopfield's neural networks is proposed. The use of differential amplifiers and active synapses allows the implementation of hundreds of neurons on a single chip. Since it is fully programmable, the circuit can be used as a content-addressable memory as well as in optimization problems.
用于大型Hopfield神经网络的新型VLSI架构
提出了一种新的Hopfield神经网络的CMOS结构。差分放大器和主动突触的使用允许在单个芯片上实现数百个神经元。由于它是完全可编程的,电路可以用作内容可寻址存储器,也可以用于优化问题。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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