{"title":"Low supply voltage high-performance CMOS current mirror with low input and output voltage requirements","authors":"J. Ramírez-Angulo, R. Carvajal, A. Torralba","doi":"10.1109/MWSCAS.2000.951695","DOIUrl":null,"url":null,"abstract":"This paper presents a scheme for the efficient implementation of a low supply voltage continuous-time high-performance CMOS current mirror with low input and output voltage requirements. This circuit combines a shunt input feedback and a regulated cascode output to achieve low input resistance and very high output resistance. This scheme has a simulated bandwidth of 40 MHz and has been experimentally verified, obtaining 0.15 V input-output voltage requirements, 250 /spl Omega/ input resistance, greater than 200 M/spl Omega/ (G/spl Omega/ ideally) output resistance with a 1 V supply in a standard CMOS technology.","PeriodicalId":437349,"journal":{"name":"Proceedings of the 43rd IEEE Midwest Symposium on Circuits and Systems (Cat.No.CH37144)","volume":"54 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-08-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 43rd IEEE Midwest Symposium on Circuits and Systems (Cat.No.CH37144)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MWSCAS.2000.951695","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5
Abstract
This paper presents a scheme for the efficient implementation of a low supply voltage continuous-time high-performance CMOS current mirror with low input and output voltage requirements. This circuit combines a shunt input feedback and a regulated cascode output to achieve low input resistance and very high output resistance. This scheme has a simulated bandwidth of 40 MHz and has been experimentally verified, obtaining 0.15 V input-output voltage requirements, 250 /spl Omega/ input resistance, greater than 200 M/spl Omega/ (G/spl Omega/ ideally) output resistance with a 1 V supply in a standard CMOS technology.