{"title":"A W-Band Wideband Power Amplifier with 18.3 dBm Psat and 15.4% PAE in 130-nm SiGe BiCMOS","authors":"Jialong Wan, Jiang Luo, Han Sun, Shi Chen, Jin He","doi":"10.1109/CISCE58541.2023.10142311","DOIUrl":null,"url":null,"abstract":"This paper presents a two-stage wideband W-band power amplifier (PA) designed in 130 nm SiGe BiCMOS technology. By employing the gain-distribution technique, the PA delivers a flat gain response over a wide bandwidth (BW). The proposed PA achieves high saturated output power $(P_{\\mathrm{s}\\mathrm{a}\\mathrm{t}})$ and power-added efficiency (PAE) by paralleling multiple small-sized transistors. According to the simulated results, the PA exhibits a peak gain of 22.3 dB at 88 GHz with a 3-dB BW of 29.2 GHz. At 94 GHz, the simulated $P_{\\mathrm{s}\\mathrm{a}\\mathrm{t}}$ and the peak PAE are 18.3 dBm and 15.4%, respectively. Such performances are excellent for a single-ended PA based on the SiGe heterojunction bipolar transistor (HBT). The small chip size of the PA, including all testing pads, is only $500\\times 620\\mu \\mathrm{m}^{2}$.","PeriodicalId":145263,"journal":{"name":"2023 5th International Conference on Communications, Information System and Computer Engineering (CISCE)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2023-04-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2023 5th International Conference on Communications, Information System and Computer Engineering (CISCE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CISCE58541.2023.10142311","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
This paper presents a two-stage wideband W-band power amplifier (PA) designed in 130 nm SiGe BiCMOS technology. By employing the gain-distribution technique, the PA delivers a flat gain response over a wide bandwidth (BW). The proposed PA achieves high saturated output power $(P_{\mathrm{s}\mathrm{a}\mathrm{t}})$ and power-added efficiency (PAE) by paralleling multiple small-sized transistors. According to the simulated results, the PA exhibits a peak gain of 22.3 dB at 88 GHz with a 3-dB BW of 29.2 GHz. At 94 GHz, the simulated $P_{\mathrm{s}\mathrm{a}\mathrm{t}}$ and the peak PAE are 18.3 dBm and 15.4%, respectively. Such performances are excellent for a single-ended PA based on the SiGe heterojunction bipolar transistor (HBT). The small chip size of the PA, including all testing pads, is only $500\times 620\mu \mathrm{m}^{2}$.