Po-Yu Li, Wei-En Lee, Ching-Tzung Lin, Li-Te Wu, Tsung-Hsien Lin
{"title":"A CMOS Temperature Sensor Based on a Chopped Continuous-Time Delta-Sigma Modulator","authors":"Po-Yu Li, Wei-En Lee, Ching-Tzung Lin, Li-Te Wu, Tsung-Hsien Lin","doi":"10.1109/VLSI-DAT49148.2020.9196368","DOIUrl":null,"url":null,"abstract":"A resistor-based temperature sensor with a 2nd-order 1-bit continuous-time delta-sigma modulator (CTDSM) to realize an energy-efficient temperature sensor is presented. The chopping technique is applied to alleviate the offset and flicker noise of the 1st-stage amplifier. A finite impulse response (FIR) filter is incorporated in the feedback path to mitigate noise fold-back due to chopping operation. The proposed circuit, implemented in 0.18-μm CMOS, consumes 183.6 μW from a 1.8-V supply. With a single conversion time of 333.3 μs, the temperature resolution is less than 3.71 m°C (1δ), which leads to a Figure of merit (FoM) of 0.84 pJ°C2. The 3δ temperature inaccuracy of 8 chips under a range of −40 °C to 100 °C is 3.8 °C after 1-point and batch calibration.","PeriodicalId":235460,"journal":{"name":"2020 International Symposium on VLSI Design, Automation and Test (VLSI-DAT)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 International Symposium on VLSI Design, Automation and Test (VLSI-DAT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSI-DAT49148.2020.9196368","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
A resistor-based temperature sensor with a 2nd-order 1-bit continuous-time delta-sigma modulator (CTDSM) to realize an energy-efficient temperature sensor is presented. The chopping technique is applied to alleviate the offset and flicker noise of the 1st-stage amplifier. A finite impulse response (FIR) filter is incorporated in the feedback path to mitigate noise fold-back due to chopping operation. The proposed circuit, implemented in 0.18-μm CMOS, consumes 183.6 μW from a 1.8-V supply. With a single conversion time of 333.3 μs, the temperature resolution is less than 3.71 m°C (1δ), which leads to a Figure of merit (FoM) of 0.84 pJ°C2. The 3δ temperature inaccuracy of 8 chips under a range of −40 °C to 100 °C is 3.8 °C after 1-point and batch calibration.