100 MHz monolithic lowpass filter using balanced-type NIC's

S. Akui, S. Takagi, M. Furihata, M. Nagata, T. Yanagisawa
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引用次数: 3

Abstract

In+3xdu&i on The monolithic filter in reference (1) requires no pnp transistors even in bias circuits and its implementation by a standard bipolar process showed good frequency characteristics up to 10 MHz. This fact tempts us to implement higher-frequency filters by a much advanced process. This summary reports a monolithic implementation of a 100 MHz lowpass filter by a 3 micron biplar process. The lowpass filter is realized by a NIC-based gyrator technique like in reference (1 ) . Although the lowpass filter inherits low sensitivity property to reactance elements from a prototype LCR filter, a canpensation for nonidealities of transistors is indispensable especially in such a extremely high-frequency filter. The campensation method is discussed in this summary. A monolithic implementation and experimental results of the filter are shown.
使用平衡型网卡的100 MHz单片低通滤波器
参考文献(1)中的单片滤波器即使在偏置电路中也不需要pnp晶体管,并且通过标准双极工艺实现的单片滤波器显示出高达10 MHz的良好频率特性。这一事实促使我们通过更高级的过程实现更高频率的滤波器。本摘要报告了用3微米双平面工艺实现100 MHz低通滤波器的单片实现。低通滤波器由参考文献(1)中基于nic的旋转器技术实现。虽然低通滤波器继承了原型LCR滤波器对电抗元件的低灵敏度特性,但对晶体管的非理想性进行补偿是必不可少的,特别是在这种高频滤波器中。在这个总结中讨论了补偿方法。给出了该滤波器的整体实现和实验结果。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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