A 4GHz 4th-Order Passive LC Bandpass Delta-Sigma Modulator with IF at 1.4GHz

2006 Symposium on VLSI Circuits, 2006. Digest of Technical Papers. Pub Date : 2006-06-15 DOI:10.1109/VLSIC.2006.1705363

L. Luh, J. Jensen, Cheng-Min Lin, Chan-Tang Tsen, D. Le, A. Cosand, S. Thomas, C. Fields

引用次数: 16

Abstract

A 4th-order bandpass DeltaSigma modulator utilizes a novel passive LC continuous-time DeltaSigma architecture to achieve the high IF (pass band) frequency (1.4GHz). A 3-bit quantizer is used to improve wideband performance. A novel architecture of noise-shaped quantizer is used to noise shape the DAC mismatch without introducing extra loop delay. Eight 2nd-order LC modulators are used for noise shaping with minimal transistor count and power consumption. Implemented with 5195 InP HBT transistors, this modulator achieved 76dB SNR and 90dB dynamic range in 1 MHz bandwidth at 1.4GHz with a 4GHz sample rate

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中频为1.4GHz的4GHz四阶无源LC带通δ - σ调制器

四阶带通DeltaSigma调制器采用新颖的无源LC连续时间DeltaSigma架构来实现高中频(通频带)频率(1.4GHz)。采用3位量化器提高宽带性能。采用一种新颖的噪声形量化器结构，在不引入额外环路延迟的情况下对DAC失配进行噪声形处理。8个二阶LC调制器用于噪声整形，晶体管数量和功耗最小。该调制器采用5195 InP HBT晶体管，在1.4GHz和4GHz采样率下，在1mhz带宽下实现了76dB的信噪比和90dB的动态范围

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

2006 Symposium on VLSI Circuits, 2006. Digest of Technical Papers.

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