A time-to-first-n-spikes and time-out read-out extension to the AER arbitration system

Abstract

This paper describes extensions of the asynchronous Address Event Representation (AER) arbitration mechanism for VLSI neural networks to obtain a Time-to-First-n-Spikes (TFnS) read-out operation in addition to the standard free running read-out. The global reset of neurons can be programmed to occur after the first n spikes or after a given time-out to the first occurrence of either of these two conditions. This solution does not require any modifications inside the array of the artificial neurons, but uses only a few additional blocks in the periphery. Like the AER communication, the additional blocks also operate asynchronously, they are fully integrated with the AER communication periphery, and they do not affect the system's scalability. The extensions of the AER arbitration system are described, and supporting simulations are provided.