Integration of SiGe HBT with $\text{f}_{\text{T}}=305\ \text{GHz},\ \text{f}_{\max}=537 \text{GHz}$ in 130nm and 90nm CMOS

Abstract

In this paper the successful implementation of a SiGe-HBT process module with an $\mathbf{f}_{\max}$ of 537GHz and an $\mathbf{f}_{\text{T}}$ of 305GHz in a 130nm BiCMOS technology is reported. A modified Epitaxial-Base-Link process, based on previous work done at IHP, was chosen for HBT device architecture, due to its proven performance potential. Ring oscillator gate-delays in current-mode-logic (CML) with a wafer mean value of 1.83ps and a standard deviation of 0.02ps were achieved. Integration options with a 90nm CMOS technology are discussed, with focus on the interaction of the HBT and CMOS process modules in terms of CMOS device parameter shift and potential remedies.