Frequency doublers with 10.2/5.2 dBm peak power at 100/202 GHz in 45nm SOI CMOS

Gang Liu, J. Jayamon, J. Buckwalter, P. Asbeck
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引用次数: 32

Abstract

This paper presents frequency doublers with high output power for millimeter-wave applications. The circuits are fabricated using a 45nm SOI CMOS technology. A new circuit topology, combining a push-push doubler core with a cascaded stacked amplifier, has been implemented to increase the output power. The first doubler delivers 10.2 dBm peak power at 100 GHz output, with a 3-dB bandwidth from 88 to 104 GHz and DC-RF efficiency of 4.1%, while the second doubler has 5.2 dBm peak power at 202 GHz, with a 3-dB bandwidth from 180 to 212 GHz and DC-RF efficiency of 3.3%. To the authors' knowledge, these are the highest powers reported for silicon frequency doublers in similar frequency ranges to date. The 200 GHz doubler also provides the highest on-chip power from a single-element signal generation circuit without power combining.
在45纳米SOI CMOS中,100/202 GHz峰值功率为10.2/5.2 dBm的倍频器
本文介绍了用于毫米波应用的高输出功率倍频器。该电路采用45nm SOI CMOS技术制造。一种新的电路拓扑,结合推推倍频核心和级联堆叠放大器,已被实现,以增加输出功率。第一个倍频器在100 GHz输出时峰值功率为10.2 dBm, 3db带宽范围为88 ~ 104 GHz, DC-RF效率为4.1%;第二个倍频器在202 GHz输出时峰值功率为5.2 dBm, 3db带宽范围为180 ~ 212 GHz, DC-RF效率为3.3%。据作者所知,这是迄今为止在类似频率范围内报道的硅倍频器的最高功率。200 GHz倍频器还提供单元件信号产生电路的最高片上功率,而无需功率组合。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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