{"title":"A 4OMHz programmable semi-systolic transversal fitter","authors":"T. Noll, S. Meier","doi":"10.1109/ISSCC.1987.1157074","DOIUrl":null,"url":null,"abstract":"This paper will report on a transversal filter architecture with programmable coefficients. A test chip of a 7 tap fitter with 10b data, 8b coefficients and a 40MHz sampling rate has been realized. The 38.5K transistors with a total chip area of 14.6mm2in a 1.5μ CMOS technology achieve a functional throughput rate-per chip area of4×10^{12}Hz times gates per cm2.","PeriodicalId":102932,"journal":{"name":"1987 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"02 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"1987 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCC.1987.1157074","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
This paper will report on a transversal filter architecture with programmable coefficients. A test chip of a 7 tap fitter with 10b data, 8b coefficients and a 40MHz sampling rate has been realized. The 38.5K transistors with a total chip area of 14.6mm2in a 1.5μ CMOS technology achieve a functional throughput rate-per chip area of4×10^{12}Hz times gates per cm2.