Evaluation of WCDMA receiver baseband processing on a Multi-Processor System-On-Chip

Abstract

In this paper, we have described the mapping of four important kernels that are multi-path estimation, demodulation, channel estimation and symbol demapping on a Multi-Processor System-on-Chip (MPSoC) platform. These kernels are important steps to be performed by the receiver working on Wide band Code-Division Multiple Access (WCDMA) standard. At first, we mapped all of these kernels on a single Reduced Instruction Set Computing (RISC) processor and later on an MPSoC to compare the performance between the two implementations. Based on our implementation, we measured the speed-up achieved for using MPSoC platforms. If we analyze the performance difference in total, a speed-up of 6.3X is achieved between the single processing core and the multicore platform with nine cores.