Optimization principles and application performance evaluation of a multithreaded GPU using CUDA

Shane Ryoo, Christopher I. Rodrigues, Sara S. Baghsorkhi, S. S. Stone, D. Kirk, Wen-mei W. Hwu
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引用次数: 994

Abstract

GPUs have recently attracted the attention of many application developers as commodity data-parallel coprocessors. The newest generations of GPU architecture provide easier programmability and increased generality while maintaining the tremendous memory bandwidth and computational power of traditional GPUs. This opportunity should redirect efforts in GPGPU research from ad hoc porting of applications to establishing principles and strategies that allow efficient mapping of computation to graphics hardware. In this work we discuss the GeForce 8800 GTX processor's organization, features, and generalized optimization strategies. Key to performance on this platform is using massive multithreading to utilize the large number of cores and hide global memory latency. To achieve this, developers face the challenge of striking the right balance between each thread's resource usage and the number of simultaneously active threads. The resources to manage include the number of registers and the amount of on-chip memory used per thread, number of threads per multiprocessor, and global memory bandwidth. We also obtain increased performance by reordering accesses to off-chip memory to combine requests to the same or contiguous memory locations and apply classical optimizations to reduce the number of executed operations. We apply these strategies across a variety of applications and domains and achieve between a 10.5X to 457X speedup in kernel codes and between 1.16X to 431X total application speedup.
基于CUDA的多线程GPU的优化原理及应用性能评估
gpu最近作为商品数据并行协处理器吸引了许多应用程序开发人员的注意。最新一代的GPU架构提供了更容易的可编程性和增强的通用性,同时保持了传统GPU的巨大内存带宽和计算能力。这个机会应该将GPGPU研究的努力从应用程序的临时移植转向建立原则和策略,从而允许将计算有效地映射到图形硬件。在这项工作中,我们讨论了GeForce 8800 GTX处理器的组织、特点和通用优化策略。在这个平台上,性能的关键是使用大量的多线程来利用大量的内核和隐藏全局内存延迟。为了实现这一点,开发人员面临的挑战是在每个线程的资源使用和同时活动的线程数量之间取得适当的平衡。要管理的资源包括寄存器的数量和每个线程使用的片上内存量、每个多处理器的线程数量以及全局内存带宽。我们还通过重新排序对片外内存的访问来提高性能,从而将对相同或连续内存位置的请求组合在一起,并应用经典优化来减少执行操作的数量。我们将这些策略应用于各种应用程序和领域,并在内核代码中实现了10.5到457X的加速,以及1.16到431X的总应用程序加速。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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