K. Taki, Bu-Yeol Lee, Hideki Tanaka, Kenzo Konishi
{"title":"Super low power 8-bit CPU with pass-transistor logic","authors":"K. Taki, Bu-Yeol Lee, Hideki Tanaka, Kenzo Konishi","doi":"10.1109/ASPDAC.1997.600352","DOIUrl":null,"url":null,"abstract":"A very low power 8-bit CPU core has been designed based on an original pass-transistor logic family, the SPL (single-rail pass-transistor logic) and SPHL (single-rail pass-transistor and holders logic). The instruction set and external timings are compatible with the Zilog Z80. The average supply current is 740 /spl mu/A at 3 V with a 10 MHz-clock, equivalent to 26% of that of the commercial CMOS Z80 CPU cores using the same design rules.","PeriodicalId":242487,"journal":{"name":"Proceedings of ASP-DAC '97: Asia and South Pacific Design Automation Conference","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1997-01-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of ASP-DAC '97: Asia and South Pacific Design Automation Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASPDAC.1997.600352","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 6
Abstract
A very low power 8-bit CPU core has been designed based on an original pass-transistor logic family, the SPL (single-rail pass-transistor logic) and SPHL (single-rail pass-transistor and holders logic). The instruction set and external timings are compatible with the Zilog Z80. The average supply current is 740 /spl mu/A at 3 V with a 10 MHz-clock, equivalent to 26% of that of the commercial CMOS Z80 CPU cores using the same design rules.