Common-Mode Voltage Reduction in Two-Level Voltage Source Inverter with Carrier-Based PWM Strategies

Abstract

Common-mode voltage (CMV) is known as a popular problem in voltage source inverter (VSI) which leads to a large number of failures in VSI-based systems. This paper presents a carrier-based PWM technique to mitigate CMV for a two-level VSI. The proposed algorithm is based on the principle that zero voltage vectors must be neglected in the switching patterns so that only active vectors are utilized. This leads to the result that the CMV amplitude is limited to one-sixth of DC voltage source. There are four different switching patterns are proposed and analyzed so that a carrier-based PWM (CBPWM) technique for CMV reduction is developed. A MATLAB/Simulink model is built to verify the theoretical analysis. Harmonic distortion factors are also be presented to evaluate the performance of the proposed strategies.