Daiane Freitas, Bruna Nagai, M. Grellert, C. Diniz, G. Corrêa
{"title":"High-Throughput Multifilter VLSI Design for the AV1 Fractional Motion Estimation","authors":"Daiane Freitas, Bruna Nagai, M. Grellert, C. Diniz, G. Corrêa","doi":"10.1109/SBCCI55532.2022.9893255","DOIUrl":null,"url":null,"abstract":"A main challenge for emerging video encoders is the high complexity introduced by their new encoding tools. In the royalty-free AV1 (AOMedia Video 1) codec, a large part of this complexity is focused on the inter prediction stage. This is particularly given to fractional motion estimation (FME), where a large number of FIR (Finite Impulse Response) type filters is used in the process of interpolation that generates fractional position samples given the integer position samples as input. Therefore, strategies to mitigate this complexity, such as designing hardware accelerators, are needed. Another recurring concern is the power dissipated as many users consume video media using battery-constrained devices. Based on that, this work introduces a dedicated multifilter hardware architecture for the AV1 codec interpolation filters with a focus on the motion estimation stage. The proposal implements the Regular, Sharp and Smooth filter families, using the operand isolation technique to avoid unnecessary power consumption. The designed architecture is capable of achieving a processing throughput of 3187.5 Msamples/sec for ME (Motion Estimation) operation, and can interpolate 8k videos resolution at 60 frames per second considering the MC (Motion Compensation) scenario.","PeriodicalId":231587,"journal":{"name":"2022 35th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design (SBCCI)","volume":"28 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-08-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 35th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design (SBCCI)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SBCCI55532.2022.9893255","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
A main challenge for emerging video encoders is the high complexity introduced by their new encoding tools. In the royalty-free AV1 (AOMedia Video 1) codec, a large part of this complexity is focused on the inter prediction stage. This is particularly given to fractional motion estimation (FME), where a large number of FIR (Finite Impulse Response) type filters is used in the process of interpolation that generates fractional position samples given the integer position samples as input. Therefore, strategies to mitigate this complexity, such as designing hardware accelerators, are needed. Another recurring concern is the power dissipated as many users consume video media using battery-constrained devices. Based on that, this work introduces a dedicated multifilter hardware architecture for the AV1 codec interpolation filters with a focus on the motion estimation stage. The proposal implements the Regular, Sharp and Smooth filter families, using the operand isolation technique to avoid unnecessary power consumption. The designed architecture is capable of achieving a processing throughput of 3187.5 Msamples/sec for ME (Motion Estimation) operation, and can interpolate 8k videos resolution at 60 frames per second considering the MC (Motion Compensation) scenario.
新兴视频编码器面临的主要挑战是其新编码工具带来的高复杂性。在免版税的AV1 (amedia Video 1)编解码器中,这种复杂性的很大一部分集中在内部预测阶段。这尤其适用于分数运动估计(FME),其中在插值过程中使用大量FIR(有限脉冲响应)类型滤波器,该滤波器在给定整数位置样本作为输入的情况下生成分数位置样本。因此,需要一些策略来减轻这种复杂性,例如设计硬件加速器。另一个反复出现的问题是,由于许多用户使用电池有限的设备来消费视频媒体,因此耗电量很大。在此基础上,本文介绍了AV1编解码器插值滤波器的专用多滤波器硬件架构,重点介绍了运动估计阶段。该方案利用运算数隔离技术实现了Regular、Sharp和Smooth滤波器族,避免了不必要的功耗。所设计的架构能够实现3187.5 m样本/秒的处理吞吐量,用于ME(运动估计)操作,并且考虑到MC(运动补偿)场景,可以以每秒60帧的速度插值8k视频分辨率。