{"title":"Nimbus: An integrated display chip","authors":"B. Locanthi, R. McLellan","doi":"10.1109/ICCD.1991.139993","DOIUrl":null,"url":null,"abstract":"With SRAM technology delivering more than a million bits per chip, it is now feasible to integrate display memory with display control. The circuit described contains a two-port SRAM array, one port being serial access combined with duty cycle modulation for gray-scale display on LCDs. The memory array itself is synchronous with the processor port, providing low-latency, high-bandwidth access for image manipulation.<<ETX>>","PeriodicalId":239827,"journal":{"name":"[1991 Proceedings] IEEE International Conference on Computer Design: VLSI in Computers and Processors","volume":"33 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1991-10-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"[1991 Proceedings] IEEE International Conference on Computer Design: VLSI in Computers and Processors","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCD.1991.139993","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
With SRAM technology delivering more than a million bits per chip, it is now feasible to integrate display memory with display control. The circuit described contains a two-port SRAM array, one port being serial access combined with duty cycle modulation for gray-scale display on LCDs. The memory array itself is synchronous with the processor port, providing low-latency, high-bandwidth access for image manipulation.<>