Identification of critical variables using an FPGA-based fault injection framework

Andreas Riefert, Jörg Müller, M. Sauer, Wolfram Burgard, B. Becker
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引用次数: 4

Abstract

The shrinking nanometer technologies of modern microprocessors and the aggressive supply voltage down-scaling drastically increase the risk of soft errors. In order to cope with this risk efficiently, selective hardware and software protection schemes are applied. In this paper, we propose an FPGA-based fault injection framework which is able to identify the most critical registers of an entire microprocessor. Further-more, our framework identifies critical variables in the source code of an arbitrary application running in its native environment. We verify the feasibility and relevance of our approach by implementing a lightweight and efficient error correction mechanism protecting only the most critical parts of the system. Experimental results with state estimation applications demonstrate a significantly reduced number of critical calculation errors caused by faults injected into the processor.
使用基于fpga的故障注入框架识别关键变量
现代微处理器不断缩小的纳米技术和咄咄逼人的电源电压降尺大大增加了软错误的风险。为了有效地应对这种风险,采用了有选择的硬件和软件保护方案。在本文中,我们提出了一个基于fpga的故障注入框架,该框架能够识别整个微处理器的最关键寄存器。此外,我们的框架识别在其本机环境中运行的任意应用程序的源代码中的关键变量。我们通过实现一个轻量级和高效的纠错机制来验证我们方法的可行性和相关性,该机制只保护系统的最关键部分。状态估计应用的实验结果表明,由于注入处理器的故障而导致的临界计算误差显著减少。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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