{"title":"Rev-Map: A Direct Gateway from Classical Irreversible Network to Reversible Network","authors":"S. Sultana, K. Radecka","doi":"10.1109/ISMVL.2011.38","DOIUrl":null,"url":null,"abstract":"We present an efficient way to realize reversible circuits directly from irreversible gate level descriptions, avoiding a search for reversible specifications of the original functions. In our scheme Toffoli-based implementation of classical gates can be used in topological order mapping. The method is then extended by introducing the notion of super cells, to reduce the number of extraneous bits and gate count. Our experimental results illustrate the impact of super cells on the size of the resulting reversible circuit. The results are better than previously proposed methods and BDD-based reversible synthesis approach.","PeriodicalId":234611,"journal":{"name":"2011 41st IEEE International Symposium on Multiple-Valued Logic","volume":"62 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 41st IEEE International Symposium on Multiple-Valued Logic","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISMVL.2011.38","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
We present an efficient way to realize reversible circuits directly from irreversible gate level descriptions, avoiding a search for reversible specifications of the original functions. In our scheme Toffoli-based implementation of classical gates can be used in topological order mapping. The method is then extended by introducing the notion of super cells, to reduce the number of extraneous bits and gate count. Our experimental results illustrate the impact of super cells on the size of the resulting reversible circuit. The results are better than previously proposed methods and BDD-based reversible synthesis approach.