C-JFET OpAmp on “Folded” Cascode with Compensation Channel for the Systematic Component of the Zero Bias Voltage

V. Chumakov, N. Prokopenko, A. Bugakova, I. Pakhomov
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引用次数: 1

Abstract

The article considers the original operational amplifier (OpAmp) circuits. The OpAmps is made on complementary FETs, which have a control pn-junction (C-JFET) manufactured by JSC “Integral”. The novelty of this OpAmp circuits is the introduction of identical uncontrolled JFET dynamic loads. This circuit technique minimizes the systematic component of the zero bias voltage in a wide temperature range ($-197\div 27^{\circ}$C) and increases the gain (up to 92 dB) of the OpAmp. Mathematical calculations of the proposed OpAmps are given. The authors of the article recommend the developed C-JFET OpAmps for low-noise, low-temperature and radiation-resistant A/D and analog interfaces (for example, comparators, signal converters, active RC/RLC filters).
带有零偏置电压系统分量补偿通道的“折叠”级联C-JFET运放
本文考虑了原始运算放大器(OpAmp)电路。OpAmps是在互补fet上制造的,互补fet具有由JSC“Integral”制造的控制pn结(C-JFET)。这种OpAmp电路的新颖之处在于引入了相同的非受控JFET动态负载。该电路技术在宽温度范围($-197\div 27^{\circ}$C)内将零偏置电压的系统分量降至最低,并增加了运放的增益(高达92 dB)。给出了所提出的运维放大器的数学计算。本文的作者推荐开发的C-JFET运放用于低噪声、低温和耐辐射的A/D和模拟接口(例如,比较器、信号转换器、有源RC/RLC滤波器)。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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