{"title":"GOLGE: a case study of a secure data communication subsystem for micro-satellites","authors":"S. Yesil, R. Sever, B. Okcan, N. Ismailoglu","doi":"10.1109/RAST.2005.1512607","DOIUrl":null,"url":null,"abstract":"This paper presents a real-time data encryption/decryption subsystem developed for a satellite, which is planned to be launched in 2007 by TUBITAK-BILTEN. The subsystem GOLGE contains two ASICs, which perform encryption/decryption using AES (Advanced Encryption Standard) and RSA (Rivest-Shamir-Adleman) algorithms and a communication interface unit. The data/command interface of the GOLGE module is implemented on a reconfigurable ASIC (FPGA), where the encryption/decryption processors have previously been designed in TUBITAK-BILTEN and prototyped in ANTIS 0.35-/spl mu/m CMOS technology. The system uses an 8-bit bidirectional data bus, which operates at a maximum frequency of 40 MHz supplying a throughput of 160 Mbit/sec and a SpaceWire interface, which provides a 100 Mbit/sec serial data communication link.","PeriodicalId":156704,"journal":{"name":"Proceedings of 2nd International Conference on Recent Advances in Space Technologies, 2005. RAST 2005.","volume":"13 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2005-06-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of 2nd International Conference on Recent Advances in Space Technologies, 2005. RAST 2005.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RAST.2005.1512607","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5
Abstract
This paper presents a real-time data encryption/decryption subsystem developed for a satellite, which is planned to be launched in 2007 by TUBITAK-BILTEN. The subsystem GOLGE contains two ASICs, which perform encryption/decryption using AES (Advanced Encryption Standard) and RSA (Rivest-Shamir-Adleman) algorithms and a communication interface unit. The data/command interface of the GOLGE module is implemented on a reconfigurable ASIC (FPGA), where the encryption/decryption processors have previously been designed in TUBITAK-BILTEN and prototyped in ANTIS 0.35-/spl mu/m CMOS technology. The system uses an 8-bit bidirectional data bus, which operates at a maximum frequency of 40 MHz supplying a throughput of 160 Mbit/sec and a SpaceWire interface, which provides a 100 Mbit/sec serial data communication link.