A Design Space Exploration Framework for Memristor-Based Crossbar Architecture

M. Barbareschi, A. Bosio, Ian O’Connor, P. Fiser, Marcello Traiola
{"title":"A Design Space Exploration Framework for Memristor-Based Crossbar Architecture","authors":"M. Barbareschi, A. Bosio, Ian O’Connor, P. Fiser, Marcello Traiola","doi":"10.1109/ddecs54261.2022.9770145","DOIUrl":null,"url":null,"abstract":"In the literature, there are few studies describing how to implement Boolean logic functions as a memristor-based crossbar architecture and some solutions have been actually proposed targeting back-end synthesis. However, there is a lack of methodologies and tools for the synthesis automation. The main goal of this paper is to perform a Design Space Exploration (DSE) in order to analyze and compare the impact of the most used optimization algorithms on a memristor-based crossbar architecture. The results carried out on 102 circuits lead us to identify the best optimization approach, in terms of area/energy/delay. The presented results can also be considered as a reference (benchmarking) for comparing future work.","PeriodicalId":334461,"journal":{"name":"2022 25th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-04-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 25th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ddecs54261.2022.9770145","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
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Abstract

In the literature, there are few studies describing how to implement Boolean logic functions as a memristor-based crossbar architecture and some solutions have been actually proposed targeting back-end synthesis. However, there is a lack of methodologies and tools for the synthesis automation. The main goal of this paper is to perform a Design Space Exploration (DSE) in order to analyze and compare the impact of the most used optimization algorithms on a memristor-based crossbar architecture. The results carried out on 102 circuits lead us to identify the best optimization approach, in terms of area/energy/delay. The presented results can also be considered as a reference (benchmarking) for comparing future work.
一种基于忆阻器的跨栅结构设计空间探索框架
在文献中,很少有研究描述如何将布尔逻辑功能实现为基于忆阻器的交叉结构,并且实际上已经提出了一些针对后端合成的解决方案。然而,合成自动化缺乏方法和工具。本文的主要目标是进行设计空间探索(DSE),以分析和比较最常用的优化算法对基于忆阻器的交叉栅架构的影响。在102个电路上进行的结果使我们确定了在面积/能量/延迟方面的最佳优化方法。提出的结果也可以被认为是一个参考(基准),比较未来的工作。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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