B. Borbely, Zoltán Kincses, Zsolt Vörösházi, Z. Nagy, P. Szolgay
{"title":"Analysis of myoelectric signals using a Field Programmable SoC","authors":"B. Borbely, Zoltán Kincses, Zsolt Vörösházi, Z. Nagy, P. Szolgay","doi":"10.1109/ECCTD.2013.6662255","DOIUrl":null,"url":null,"abstract":"A platform design for the analysis of human myoelectric signals (MES) is presented. Offline recorded multichannel signals of forearm muscles are processed with a Field Programmable SoC in order to classify different movement patterns to control human-assisting electromechanical systems with multiple degrees of freedom (e.g. a prosthetic hand). Benchmark results of an ANSI C implementation are shown to assess the raw performance of the built-in ARM cores of the SoC. Possible computational bottlenecks are located based on the results and custom hardware implementations are shown to fully utilize the flexibility and performance of the used hardware platform.","PeriodicalId":342333,"journal":{"name":"2013 European Conference on Circuit Theory and Design (ECCTD)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-11-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 European Conference on Circuit Theory and Design (ECCTD)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ECCTD.2013.6662255","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5
Abstract
A platform design for the analysis of human myoelectric signals (MES) is presented. Offline recorded multichannel signals of forearm muscles are processed with a Field Programmable SoC in order to classify different movement patterns to control human-assisting electromechanical systems with multiple degrees of freedom (e.g. a prosthetic hand). Benchmark results of an ANSI C implementation are shown to assess the raw performance of the built-in ARM cores of the SoC. Possible computational bottlenecks are located based on the results and custom hardware implementations are shown to fully utilize the flexibility and performance of the used hardware platform.