A fast range matching architecture with unit storage expansion ratio and high memory utilization using SBiCAM for packet classification

Abstract

In networking, mainly for routers, firewalls, access control lists, etc., packet classification lies in the critical data path as it has to act upon each and every packet at wire-speed. Another critical issue associated with packet classification is efficient representation of rules with range(s) which takes multiple TCAM rule entries in the rule table called range expansion. In addition, range expansion process requires a significant amount of redundant information to be stored along with the sub ranges which creates a bottleneck in the performance of packet classification. The proposed architecture at first intends to reduce and fixes the number of rule entries required to define a rule with or without range(s) to exactly one over (2w-2) or in some cases 4(w-1)2 Storage Expansion Ratio (SER) for a w-bit range. Secondly, it avoids the inevitability of range expansion problem and thereby saves a substantial time delay associated with range pre-processing or encoding technique which is done using software. Thirdly, this architecture directly stores a rule irrespective of the range(s) occurring in the port fields (Source Port, Destination Port) by employing a novel memory called SBiCAM. Furthermore, it has been observed that 24-bits are unused per rule entry, so, in the proposed architecture, no such free bits are kept by introducing a novel 7-tuple rule format for storing rule entries in the proposed hybrid rule table and thereby results into high memory utilization. The proposed range matching architecture also exhibits excellent performance in terms of expansion ratio, power and speed.