Conductances and noise in trapezoidal association of transistors for analog applications using a SOT methodology [in CMOS]

Abstract

This paper presents results on comparisons and advantages that allow mixed analog-digital circuit design on SOT (sea-of-transistors) array methodology. The aim is to present the advantages of using a suitable trapezoidal association of digital transistors, to improve the output conductance. Noise considerations are also presented to further justify the need for several transistors in the association, improving the characteristic noise of short-channel transistors. Several structures of TAT (trapezoidal association of transistors) and single transistors of electrically equivalent sizes were implemented to allow better comparison and to evaluate noise performance. The SOT unit transistors are on a fixed-size array and experimental results obtained are herein shown for 1.0 /spl mu/m digital technology.