Reducing Impact of CNFET Process Imperfections on Shape of Activation Function by Using Connection Pruning and Approximate Neuron Circuit

K. Sheikh, Lan Wei
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Abstract

Deep Neural Networks (DNNs) based on Carbon nanotube field effect transistor (CNFET) technology can leverage the potential energy benefits of CNFET based technology in comparison to conventional Si technology. However, like other emerging materials based technologies, the current fabrication processes for CNFETs lack the quality, resulting in CNFETs suffering from process imperfections, consequently degradation in circuit-level performance. Such imperfections will cause timing failure and distort the shape of non-linear activation functions, which are vital in DNN, leading to significant degradation in classification accuracy. We utilize pruning of synaptic weights which combined with proposed approximate neuron circuit significantly reduces the chance of timing failure, and achieve better frequency of operation (speed), even using highly imperfect process. In our example, the proposed configuration with approximate neuron and pruning at a high imperfect process $(PCNT_{open}=\ 40\%)$, in comparison to base configuration of precise neuron and no pruning with ideal process $(PCNT_{open}=\ 0\%)$, achieves peak accuracy only 0.19% less, but significant energy-delay-product (EDP) advantage (56.7% less), at no area penalty.
利用连接剪枝和近似神经元电路降低CNFET过程缺陷对激活函数形状的影响
与传统的Si技术相比,基于碳纳米管场效应晶体管(CNFET)技术的深度神经网络(DNNs)可以利用CNFET技术的潜在能量优势。然而,与其他基于新兴材料的技术一样,目前cnfet的制造工艺缺乏质量,导致cnfet遭受工艺缺陷,从而导致电路级性能下降。这种缺陷会导致时序失效,扭曲非线性激活函数的形状,这在DNN中至关重要,导致分类精度显著下降。我们利用突触权值的修剪与所提出的近似神经元电路相结合,大大减少了定时失败的机会,并实现了更好的操作频率(速度),即使使用高度不完美的过程。在我们的例子中,与精确神经元的基本配置和理想过程$(PCNT_{open}=\ 0\%)$的不修剪相比,在高不完美过程$(PCNT_{open}=\ 40\%)$下,具有近似神经元和剪枝的配置仅降低了0.19%的峰值精度,但在没有面积损失的情况下,具有显著的能量延迟积(EDP)优势(降低了56.7%)。
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