A novel substrate-bias generator for low-power and high-speed DRAMs

Abstract

This paper describes an efficient substrate-bias generator (SBG) for low-power and high-speed DRAMs. In this SBG, the charge pumping circuit and driving and supply voltage circuit are newly proposed. The proposed circuit has advantages as follows. First, the charge pumping circuit doesn't suffer from V/sub T/ loss and is applicable to low-voltage DRAMs. Second, the driving and supply voltage switching circuit can supply stable substrate voltage by switching the supply voltage of the driving stage. So, it can reduce the power consumption by making a stable substrate back bias voltage (V/spl dot//sub BB/) because of its high pumping efficiency.