Thyristor-Based Volatile Memory in Nano-Scale CMOS

Abstract

A thyristor-based memory cell technology provides SRAM-like performance at 2times to 3times the density of conventional 6T SRAM. The technology is readily embedded into conventional nano-scale CMOS and scales into future SOI and FinFET technologies. A 19mm2 0.13mum 9Mb SOI test chip has a 0.562mum2 cell with a cell-R/W time <2ns