A mismatch insensitive reconfigurable discrete time biosignal conditioning circuit in 180 nm MM CMOS technology

Priyanka Kimtee, D. Das, M. Baghini
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引用次数: 1

Abstract

This paper presents a discrete time fully differential CMOS signal conditioning circuit for acquisition of biosignals. It is realized using switched capacitors (SC), which provides reconfigurability, high precision, high CMRR and low sensitivity to temperature and process variations. However, the SC circuit suffers from various errors like charge injection and clock feedthrough which have an impact on the precision of the signal sensing. Moreover fully differential circuit is very sensitive to capacitor mismatch leading to degradation of CMRR. To overcome this limitation, a new circuit configuration is presented, which uses the concept of error averaging. As a result, the circuit achieves minimum CMRR of 90 dB for frequencies in the range of 40–60 Hz, even in the presence of 0.1% capacitor mismatch, along with process and temperature variations. Simulation results show the worst case relative output error of ± 0.57% and ± 0.9% with DC and time varying input common mode voltage respectively. Also, the circuit achieves 10-bit resolution, even with capacitor mismatch and input common mode variations.
基于180nm MM CMOS技术的失配不敏感可重构离散时间生物信号调理电路
提出了一种用于生物信号采集的离散时间全差分CMOS信号调理电路。它采用开关电容器(SC)实现,具有可重构性、高精度、高CMRR和对温度和工艺变化的低灵敏度。然而,SC电路存在电荷注入和时钟馈通等各种误差,影响信号传感的精度。此外,全差分电路对电容失配非常敏感,导致CMRR下降。为了克服这一限制,提出了一种新的电路结构,它使用了误差平均的概念。因此,即使在存在0.1%电容失配以及工艺和温度变化的情况下,该电路在40-60 Hz的频率范围内也能实现90 dB的最小CMRR。仿真结果表明,在直流和时变共模输入电压下,最坏情况下的相对输出误差分别为±0.57%和±0.9%。此外,即使电容失配和输入共模变化,电路也能实现10位分辨率。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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