PWM Selection Method for High Performance of Two-Level Three-Phase Voltage Source Inverters in High Load Power Factor Ranges

Junhyuk Lee, Jung-Wook Park
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引用次数: 1

Abstract

In this paper, a pulse-width modulation (PWM) selection method for two-level three-phase voltage source inverters (VSIs) is presented to reduce the common-mode voltage (CMV) or the DC-link capacitor current (DCC) in high load power factor ranges. In general, the high CMV generates the large common-mode current, which causes electromagnetic emissions and motor damage. Also, the large DCC aggravates the lifespan and increases the size of the DC-link capacitors. Therefore, decreasing the CMV and DCC is necessary in the VSI systems. For this purpose, various PWM strategies, such as active zero-state PWM, near-state PWM, extended double-carrier PWM, and multi-carrier generalized discontinuous PWM, are reviewed. Furthermore, based on these PWM strategies, the PWM selection method is proposed to effectively reduce the CMV and DCC. The effectiveness of the PWM selection method is verified by simulation and experimental results with a permanent magnet synchronous motor drive system.
高负载功率因数范围内高性能两电平三相电压源逆变器的PWM选择方法
本文提出了一种在高负载功率因数范围内降低共模电压(CMV)或直流链路电容电流(DCC)的两电平三相电压源逆变器脉宽调制(PWM)选择方法。一般情况下,高CMV会产生较大的共模电流,造成电磁发射和电机损坏。此外,大的DCC加重了使用寿命,并增加了直流链路电容器的尺寸。因此,在VSI系统中降低CMV和DCC是必要的。为此,本文综述了各种PWM策略,如有源零状态PWM、近状态PWM、扩展双载波PWM和多载波广义不连续PWM。在此基础上,提出了有效降低CMV和DCC的PWM选择方法。通过对永磁同步电机驱动系统的仿真和实验验证了PWM选择方法的有效性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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