Teaching design-oriented VHDL

Abstract

The teaching of state-of-the-art design techniques (an HDL, for example) requires also the learning of a variety of CAD tools. However, though learning such tools is indispensable, it should not come at a sacrifice of fundamental principles. To attain a balance between the practices and fundamental design concepts, we have adopted a "design-oriented" approach in the teaching of VHDL at CEFET-PR. In it, the focus is partially shifted from the language itself to the designs: basic design principles are reviewed and commented, the examples are rich in details, the code is synthesized into physical devices, and simulations are always performed and examined.