Deposition Condition Dependence Of Silicon Nitride Used As A Diffusion Barrier During MBE Growth Of III-Vs On Silicon VLSI Electronics

Abstract

During the heteroepitaxy of GaAs on CMOS devices, it is necessary to protect the silicon dioxide from gallium, which diffuses readily into SiO2. We have found that such diffusion results in a conductive oxide. Since it has been shown previously that silicon nitride inhibits the diffusion of gallium [ 11, it was used here as the diffusion barrier during MBE growth. In order for the nitride to be successfully used for this purpose however, it must have sufficient resistance to hydrofluoric acid (HF) used to clean the silicon surface prior to growth. In addition, it must be mechanically robust enough to undergo a high temperature (900 "C) oxide desorption step necessary for the successful epitaxy of GaAs on Si without cracking or losing adhesion. The latter is especially critical for sub-micron CMOS, which utilizes a reflowable glass (at 850 "C) to round the edges of the contact holes. We have found that this liquificatioii of the reflow glass places a large stress on the nitride diffusion barrier. We have determined that the conditions during the plasma enhanced chemical vapor deposition (PECVD) of silicon nitride are critical to the ability of the nitride to fulfill both of the above requirements, and they are discussed here. A cross-section of the MOSFET structure just prior to MBE growth is shown in Figure 1. The CMOS fabrication was done in (100) silicon oriented 3" off axis toward the (1 10) as required for high quality GaAs growth on silicon [2]. Due to the high temperatures involved with MBE, it was necessary to perform growth just prior to first level metalization. In submicron CMOS technology such as that used here, the topmost film in the field oxide dielectric structure is required to be a reflowable glass such as phosphosilicate glass or BPTEOS, which has a lower melting point than that of standard Si02. The purpose of the reflow glass is to allow the rounding of the top comers of the contact holes to ensure good step coverage during the metalization of the transistors. This rounding is achieved through a heat treatment at 800-850 OC after the contact holes are opened through the dielectrics [3]. Our wafers were then passivated with a standard PECVD silicon nitride deposited using ammonia and silane. Bare silicon areas for MBE growth were opened by reactive ion etching through the dielectric stack of Si02, reflow glass, and silicon nitride, followed by a specialized wet chemical clean [4] including the use of HF acid in order to prepare the exposed silicon surface for growth. The first step in the growth sequence is the removal of the native oxide which forms on the surface of the open areas of silicon by means of a 900-950 "C oxide desorption done under vacuum in the MBE chamber. Once the oxide is removed, the epitaxial films are grown from which the GaAs/AlGaAs multiple quantum well modulators are formed. The details of this growth are given in a separate publication [5]. When using the standard nitride films from the CMOS foundry, it was determined that the films could not withstand the thermal cycling without cracking. This was true of a n y thickness of nitride film. PECVD silicon nitride films deposited with the use of ammonia have been determined to contain up to 30 % hydrogen resulting in high tensile stress and poor mechanical performance [6]. PECVD nitride films deposited using only silane and nitrogen however have been shown to have a much lower percentage (7-15 %) of hydrogen and tensile stress levels near zero [7]. Therefore here we explore cracking and adhesion of nitride deposited using these gases when subjected to the thermal cycling on submicron CMOS. In addition, we have measured the general properties of these films (HF etch rate and refractive index) over a greatly extended range of nitrogen:silane gas ratios (53: 1 to 1250: 1) compared to that studied in [7] (30:l to 167:l) and find that these properties (especially HF etch rate) vary considerably as shown in Figure 2. We find that mechanical stability and resistance to HF is acheived for the same gas ratios (<300:1), making these films ideally suited for use as a gallium diffusion barrier during MBE on CMOS.