{"title":"A digitally-controlled 20 b dynamic range BiCMOS stereo audio processor","authors":"P. Nuijten, K. Hart","doi":"10.1109/ISSCC.1989.48257","DOIUrl":null,"url":null,"abstract":"The authors describe a stereo audio processor chip with analog performance that is achieved by a tradeoff among several important requirements including distortion, noise, DC offsets and crosstalk. In the system, each source selector has seven audio inputs and three buffered outputs. A fourth source selector output is connected to a programmable volume controller with an amplification range between +23 dB and -79 dB in 1-dB steps. The I/sup 2/C transceiver provides communication with a microcontroller by means of a two-wire serial bus. The decoder stores and decodes the received control data and drives the switches in the analog blocks. The digital part also contains a power-on-reset and power-dip control. The system architecture is determined by the low distortion target. The chip's performance is summarized in a table.<<ETX>>","PeriodicalId":385838,"journal":{"name":"IEEE International Solid-State Circuits Conference, 1989 ISSCC. Digest of Technical Papers","volume":"70 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1989-02-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE International Solid-State Circuits Conference, 1989 ISSCC. Digest of Technical Papers","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCC.1989.48257","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
The authors describe a stereo audio processor chip with analog performance that is achieved by a tradeoff among several important requirements including distortion, noise, DC offsets and crosstalk. In the system, each source selector has seven audio inputs and three buffered outputs. A fourth source selector output is connected to a programmable volume controller with an amplification range between +23 dB and -79 dB in 1-dB steps. The I/sup 2/C transceiver provides communication with a microcontroller by means of a two-wire serial bus. The decoder stores and decodes the received control data and drives the switches in the analog blocks. The digital part also contains a power-on-reset and power-dip control. The system architecture is determined by the low distortion target. The chip's performance is summarized in a table.<>