Enclosed Layout Transistor with Active Region Cutout

Abstract

An enclosed-layout-transistor (ELT) is modified using the active region cutout (ARC) technique. This transistor is called ARCELT. 3-D simulations were performed to obtain the leakage current with respect to radiation induced charge density, while keeping the layout dimensions and process parameters unchanged, for a standard nMOS transistor, the ELT and the ARCELT. The aspect ratio W/L of ARCELT was found to be smaller than ELT. It is shown that the ARCELT has radiation tolerance similar to that of ELT. The ARCELT can be configured as a triple electrode MOSFET device that can be used to design compound transistors. Two applications of ARCELT as a compound transistor are shown.