{"title":"An IF 8-element 2-beam bit-stream band-pass beamformer","authors":"J. Jeong, Nicholas Collins, M. Flynn","doi":"10.1109/RFIC.2015.7337761","DOIUrl":null,"url":null,"abstract":"We introduce a new ADC-digital co-design approach to IF digital beamforming (DBF) that combines continuous-time band-pass ΔΣ modulators (CTBPDSMs) and bit-stream processing (BSP) to achieve highly flexible and low-cost DBF. Our prototype DBF IC digitizes eight 260MHz IF signals at 1040MS/s with band-pass ADCs, and performs DBF directly on the over-sampled, un-decimated ADC outputs, achieving band-pass filtering in both spatial and frequency domains. With 12b programmable complex weights, the prototype generates two simultaneous beams, and achieves an SNDR of 63.3dB with an 8.9dB array improvement over a 10MHz bandwidth. Fabricated in 65nm CMOS, the prototype is the first IC implementation of IF DBF, occupies 0.28mm2, and consumes 124mW.","PeriodicalId":121490,"journal":{"name":"2015 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"76 3 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-05-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RFIC.2015.7337761","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
We introduce a new ADC-digital co-design approach to IF digital beamforming (DBF) that combines continuous-time band-pass ΔΣ modulators (CTBPDSMs) and bit-stream processing (BSP) to achieve highly flexible and low-cost DBF. Our prototype DBF IC digitizes eight 260MHz IF signals at 1040MS/s with band-pass ADCs, and performs DBF directly on the over-sampled, un-decimated ADC outputs, achieving band-pass filtering in both spatial and frequency domains. With 12b programmable complex weights, the prototype generates two simultaneous beams, and achieves an SNDR of 63.3dB with an 8.9dB array improvement over a 10MHz bandwidth. Fabricated in 65nm CMOS, the prototype is the first IC implementation of IF DBF, occupies 0.28mm2, and consumes 124mW.