Nanotechnology circuit design - the "interconnect problem"

Abstract

Proposed a modified metallic interconnect as a possible solution of the so-called "interconnect problem" in reference to a nanotechnology circuit where an extremely high density of devices in the circuit requires a very large number of very high-speed interconnects. This can result in high crosstalk introduced by the very close proximity of the rather large number of interconnects in addition to the excessive heating problem caused by very high current densities in the interconnect lines which can further lead to failure of the interconnects due to the phenomenon called electromigration. Rather than a usual single-path interconnect, the modified interconnect consists of two or more paths between the driver and the load. These paths are stacked vertically isolated from one another by insulating layers between them thereby taking the same area on the chip as a single-path interconnect. Using a ladder network approximation for the interconnect, we carried out a first-order analysis of the propagation delays in a multipath interconnect. We also determined approximately the electromigration-induced MTF of such a multi-path inter-connect structure.