ASIC Applications [session summary]

Abstract

Summary form only given, as follows. We find ASIC technology in a wide variety of demanding applications where high performance, low power, small weight or low parts count is a driving factor in design. This session has six articles describing a wide set of diverse applications. We begin with three articles describing ASICs for industrial applications. The first work describes a precision scale controller tha1 increases position resolution by an order of magnitude over existing methodologies. The second work describes a 32 bit embedded SPARC microcontroller designed for high performance motor control. The third details the utilization of a compact neural net design for precisely controlling electrical motor current. The forth work describes FPGA implementation of a Java processor designed to speed up applications v ritten in the popular Java programming language. The FPGA implementation is flexible, allowing the update of the processor design as the Java specification evolves. The fifth article describes the memory architecture of a high performance reconfigurable ATM switch supporting advanced features such as backpressure. The sixth pap r describes an ASIC implementation of the IDEA encryption algorithm. The authors describe an implementation that takes advantage of both temporal and spatial parallelism available in the IDEA algorithm. The HiPCrypto ASIC can encrypt/decrypt data at rates of up to 4.4 Gbps.