{"title":"Digital architecture of 8×8 MIMO Hardware channel simulator for time-varying heterogeneous systems with LTE-A, 802.11ac and VLC signals","authors":"B. Habib, B. Baz","doi":"10.1109/ACTEA.2016.7560138","DOIUrl":null,"url":null,"abstract":"This paper presents the design of an 8×8 Multiple-Input Multiple-Output (MIMO) hardware simulator for time-varying propagation channels using heterogeneous systems (LTE-A and 802.11ac) with Visible Light Communications (VLC) signals. A new specific architecture of the simulator digital block is presented to characterize 5G scenarios. It is designed and implemented on a Xilinx Virtex-VII XC7VX690T Field Programmable Gate Array (FPGA). The simulator uses different impulse responses to cover many types of channels by merging TGn models, 3GPP-LTE models, outdoor-to-indoor measurements results and VLC models. The accuracy of the architecture, its FPGA occupation and latency are analyzed.","PeriodicalId":220936,"journal":{"name":"2016 3rd International Conference on Advances in Computational Tools for Engineering Applications (ACTEA)","volume":"30 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-07-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 3rd International Conference on Advances in Computational Tools for Engineering Applications (ACTEA)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ACTEA.2016.7560138","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5
Abstract
This paper presents the design of an 8×8 Multiple-Input Multiple-Output (MIMO) hardware simulator for time-varying propagation channels using heterogeneous systems (LTE-A and 802.11ac) with Visible Light Communications (VLC) signals. A new specific architecture of the simulator digital block is presented to characterize 5G scenarios. It is designed and implemented on a Xilinx Virtex-VII XC7VX690T Field Programmable Gate Array (FPGA). The simulator uses different impulse responses to cover many types of channels by merging TGn models, 3GPP-LTE models, outdoor-to-indoor measurements results and VLC models. The accuracy of the architecture, its FPGA occupation and latency are analyzed.