{"title":"A 0.2V, 7.5 μW, 20 kHz ΣΔ modulator with 69 dB SNR in 90 nm CMOS","authors":"U. Wismar, D. Wisland, P. Andreani","doi":"10.1109/ESSCIRC.2007.4430281","DOIUrl":null,"url":null,"abstract":"This paper presents a frequency-to-digital SigmaDelta modulator designed in a digital 90nm CMOS process, operating with a supply voltage of 0.2 V. For a 7.5 muW power consumption, the SNR is 68.9 dB and the SNDR is 60.3 dB over a 20Hz-20kHz bandwidth. This work shows that the SNR/SNDR performance of this kind of SigmaDelta converter can be adjusted over a wide range, while maintaining a state-of-the-art flgure-of-merit of 82 fJ/conversion.","PeriodicalId":121828,"journal":{"name":"ESSCIRC 2007 - 33rd European Solid-State Circuits Conference","volume":"22 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"38","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"ESSCIRC 2007 - 33rd European Solid-State Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSCIRC.2007.4430281","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 38
Abstract
This paper presents a frequency-to-digital SigmaDelta modulator designed in a digital 90nm CMOS process, operating with a supply voltage of 0.2 V. For a 7.5 muW power consumption, the SNR is 68.9 dB and the SNDR is 60.3 dB over a 20Hz-20kHz bandwidth. This work shows that the SNR/SNDR performance of this kind of SigmaDelta converter can be adjusted over a wide range, while maintaining a state-of-the-art flgure-of-merit of 82 fJ/conversion.