Accurate Circuit Performance Prediction Model and Lifetime Prediction Method of NBT Stressed Devices for Highly Reliable ULSI Circuits

R. Kuroda, K. Watanabe, A. Teramoto, M. Mifuji, T. Yamaha, S. Sugawa, T. Ohmi
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Abstract

An accurate circuit level prediction model for predicting performance degradation due to negative bias temperature (NBT) stress and a device lifetime prediction method are proposed in this paper. The proposed model consists of a threshold voltage (Vth) shift and a drain current (ID) reduction models. The developed models are incorporated into a compact MOSFET model so that we can directly link the device electrical degradation to the circuit simulation. The validity of the developed models is confirmed by the experimental results of I-V characteristics of pMOSFET before and after stress. Then, the circuit performance prediction is carried out for a 199-stage ring oscillator on its waveform and oscillation frequency. Excellent agreements between experimental results and predicted results are obtained. Since only a suitable acceleration method allows us to develop the accurate models, the new negative bias temperature instability (NBTI) acceleration method using cold-holes is also developed. Finally, we demonstrate the accurate NBTI lifetime prediction using the method
高可靠ULSI电路中NBT应力器件的精确电路性能预测模型及寿命预测方法
本文提出了一种准确预测负偏置温度(NBT)应力导致性能下降的电路电平预测模型和器件寿命预测方法。该模型由一个阈值电压(Vth)转变和漏极电流(ID)减少模型。所开发的模型被整合到一个紧凑的MOSFET模型中,这样我们就可以直接将器件的电气退化与电路仿真联系起来。通过应力前后pMOSFET的I-V特性实验结果,验证了所建立模型的有效性。然后,电路的性能进行预测是199 -阶段环振荡波形和振荡频率。实验结果与预测结果吻合良好。由于只有采用合适的加速方法才能建立准确的模型,因此本文还提出了一种新的冷孔负偏置温度不稳定性加速方法。最后,验证了该方法对NBTI寿命的准确预测
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